Which of the following LOGIC gate combination will produce the input output truth table given as:
| A | B | Y |
|---|---|---|
| 0 | 0 | 0 |
| 1 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 1 | 1 |
Answer & explanation
Correct answer: option 2
The correct answer is Option (2)
The truth table is that of an OR gate, \( Y = A+B \). In the circuit of Option (2) both inputs of each first-stage NAND gate are joined, so each acts as a NOT gate.
\( \overline{A\cdot A} = \overline{A},\qquad \overline{B\cdot B} = \overline{B} \)
The second NAND gate then receives \( \overline{A} \) and \( \overline{B} \).
\( Y = \overline{\overline{A}\cdot\overline{B}} = \overline{\overline{A}}+\overline{\overline{B}} = A+B \)
This is De Morgan’s law: the NAND of the inverted inputs is an OR gate.
Shortcut: Test the single row \( A=1,\ B=0 \), which must give \( Y=1 \). Option (1) (NOR-NOR) gives \( \overline{\overline{1}+\overline{0}} \), that is 0, since it is an AND gate. Option (3) (AND-NAND) gives \( \overline{1\cdot0}=1 \) but then fails the row \( A=1,\ B=1 \) (it gives 0). Option (4) (OR-NOR) is a NOR gate and gives 0 for \( A=1,\ B=0 \). Only Option (2) survives.